Home › Magazines › 2002 › September › Parallel JTAG Interface

Parallel JTAG Interface

Published in issue 313, September 2002

Parallel JTAG Interface
This circuit is for an interface between the parallel port of a PC and a socalled JTAG interface. This type of circuit was originally developed by a company called Altera, which referred to it as the ‘Byteblaster’.The version described here is compatible with the Byteblaster (electrically it is almost identical). This has the advantage that programs written for use with the Byteblaster can also be used with this interface. The circuit itself is very simple. K1 is connected to the parallel port of the PC, whereas signals D0, D1 and D6 are brought to the JTAG connector via IC1. The output of the JTAG connector (TDO) is in turn fed back to the PC’s BUSY signal via IC1. Pin 7 of the JTAG connector is used to provide an extra output. This signal is brought to the SELECT input of the parallel port via IC1.

Components

Resistors:
R1-R5,R9-R12,R15-R18 = 100Ohm
R6,R7,R8,R13,R14,R19,R20 = 10kOhm
Capacitors:
C1 = 100nF
Semiconductors:
IC1 = 74HCT244
Miscellaneous:
K1 = 25-way sub-D plug (male), PCB mount
K2 = 10-way boxheader
PCB, order code 020008-1

Click below to download a PDF copy of this article from Elektor magazine.

 

Downloads 

PDF Article (e029034.pdf)
10 Elektor Credits
PCB layout (020008-PCB.pdf)
10 Elektor Credits
 

Order from ThePCBShop 

PCB

Please note. In view of the complexity of international markets, Elektor cannot guarantee the availability of components for this project.

Spotlight

FPGA Course on CD-ROM

Learn all about Field Programmable Gate Array technology in 9 chapters.