Byte generator

This design was originally ‘knocked together’ to test out a prototype DAC circuit to allow the digital codes to be entered manually. The circuit was later modified to test an opto-isolated low side switch which required an open collector transistor driver. The final circuit combines the virtues of both designs.In the circuit diagram, Figure 1, SW1 is a 16-pin 8-way DIL switch and is fitted into a 16 way DIL socket (more about this later). The common side of the switch is grounded and the switched side is pulled up to +5V via a 4.7 k? SIL resistor network (R1). This is then connected to K1 (which is a doubled up 10-way SIL header or 20-way IDC header), and from there to the inputs of IC1, a 74LS245 which is configured as a buffer. The outputs of IC1 are connected to both K2 and the inputs of IC2. IC2 is a ULN2801A, which is an octal Darlington driver chip with open collector outputs. The outputs of IC2 are available on K3.

Resistors:
R1 = 8 × 4K7Ω SIL resistor pack
R2 = 8 × 470Ω SIL resistor pack
Integrated Circuits:
IC1 = 74LS245 or 74HCT245
IC2 = ULN2801A
Miscellaneous:
D1-D8 = 5 mm ↔ 2mm wide LED, high efficiency
K1 = 20 way IDC connector
K2 = 10 way SIL pin header
K3 = 11 way SIL pin header
K4 = 3 way SIL connector with jumper
16 way turned pin DIL socket

Clock divider extension
Resistor:
R1 = 4k7Ω
Capacitor:
C1 = 100nF
Semiconductor:
D9 = 1N4148
Integrated Circuit:
IC1 = 74HCT4040
Miscellaneous:
K4 = 20 way DIL transition
K5 = 20 way IDC
20 way ribbon cable